AVX 512 beneficial for Boinc projects?

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ProDigit

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Message 93955 - Posted: 30 Nov 2019, 7:52:10 UTC

In both CPU and GPU crunching, does it make a difference to get a 10th gen Intel CPU supporting AVX 512, vs a 9th gen supporting only SSE4 / AVX2?
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robsmith
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Message 93956 - Posted: 30 Nov 2019, 9:24:00 UTC

That entirely depends on the how the projects have produced their applications.
Generally, not for GPU, but there may be cases where it does have an effect (for good or bad).
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Profile Keith Myers
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Message 93964 - Posted: 30 Nov 2019, 20:34:12 UTC

I'd be interested to hear if ANY project has science applications that can make use of AVX-512.
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Richard Haselgrove
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Message 93965 - Posted: 30 Nov 2019, 21:53:46 UTC - in response to Message 93964.  

I doubt any project scientist would do that, because absolute speed would be negated by all the caching, task swapping, and transmission overheads of a BOINC project. They'd just build a 'one size fits all' app and recruit more volunteers.

But some volunteer optimiser might build one for an open-source project, and make it available under anonymous platform.
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Dr Who Fan
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Message 93976 - Posted: 1 Dec 2019, 15:03:42 UTC

I believe PrimeGrid has apps that support AVX-512 instructions.
But be warned that you Will need lots of CPU cooling for any app running AVX-512.
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ProDigit

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Message 93980 - Posted: 1 Dec 2019, 15:38:32 UTC
Last modified: 1 Dec 2019, 15:39:14 UTC

AVX-512 is a form of instruction often used or aimed towards deep learning; that was first introduced in the Xeon Phis.
Higher watts is to be expected, when the throughput is higher.

I'm just not sure if more work can be done using this instruction on a multicore CPU, vs a GPU.

In Folding@home tasks, the average multi core CPU (8+ cores) runs at anywhere between 30k PPD and 100k PPD.
This without AVX-512.
In comparison, a mid level GTX 1050 runs at just over 100k PPD (~133k).

I'm just wondering if the AVX-512 instruction would close the gap somewhat between CPU and GPU?
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Jim1348

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Message 93983 - Posted: 1 Dec 2019, 16:34:25 UTC - in response to Message 93980.  
Last modified: 1 Dec 2019, 16:34:56 UTC

They were sort of thinking about AVX 512 on LHC, but nothing has come of it.
This post refers to CMS, but I have seen it mentioned for SixTrack too.
https://lhcathome.cern.ch/lhcathome/forum_thread.php?id=4584&postid=34083#34083

It is said to be a not very efficient use of chip area, and Intel may not repeat it.
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Message boards : Questions and problems : AVX 512 beneficial for Boinc projects?

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